// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See Vsecret_impl.h for the primary calling header

#include "Vsecret_impl.h"
#include "Vsecret_impl_PSvZrA.h"

//==========

VerilatedContext* Vsecret_impl::contextp() {
    return __VlSymsp->_vm_contextp__;
}

void Vsecret_impl::eval_step() {
    VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate Vsecret_impl::eval\n"); );
    Vsecret_impl_PSvZrA* __restrict vlSymsp = this->__VlSymsp;  // Setup global symbol table
    Vsecret_impl* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
#ifdef VL_DEBUG
    // Debug assertions
    PSS4mM();
#endif  // VL_DEBUG
    // Initialize
    if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) PS59SB(vlSymsp);
    // Evaluate till stable
    int __VclockLoop = 0;
    QData __Vchange = 1;
    do {
        VL_DEBUG_IF(VL_DBG_MSGF("+ Clock loop\n"););
        PSb7EA(vlSymsp);
        if (VL_UNLIKELY(++__VclockLoop > 100)) {
            // About to fail, so enable debug to see what's not settling.
            // Note you must run make with OPT=-DVL_DEBUG for debug prints.
            int __Vsaved_debug = Verilated::debug();
            Verilated::debug(1);
            __Vchange = PSk3CK(vlSymsp);
            Verilated::debug(__Vsaved_debug);
            VL_FATAL_MT("PS0mfn", 10, "",
                "Verilated model didn't converge\n"
                "- See https://verilator.org/warn/DIDNOTCONVERGE");
        } else {
            __Vchange = PSk3CK(vlSymsp);
        }
    } while (VL_UNLIKELY(__Vchange));
}

void Vsecret_impl::PS59SB(Vsecret_impl_PSvZrA* __restrict vlSymsp) {
    vlSymsp->__Vm_didInit = true;
    PSHAFY(vlSymsp);
    // Evaluate till stable
    int __VclockLoop = 0;
    QData __Vchange = 1;
    do {
        PSl3Hn(vlSymsp);
        PSb7EA(vlSymsp);
        if (VL_UNLIKELY(++__VclockLoop > 100)) {
            // About to fail, so enable debug to see what's not settling.
            // Note you must run make with OPT=-DVL_DEBUG for debug prints.
            int __Vsaved_debug = Verilated::debug();
            Verilated::debug(1);
            __Vchange = PSk3CK(vlSymsp);
            Verilated::debug(__Vsaved_debug);
            VL_FATAL_MT("PS0mfn", 10, "",
                "Verilated model didn't DC converge\n"
                "- See https://verilator.org/warn/DIDNOTCONVERGE");
        } else {
            __Vchange = PSk3CK(vlSymsp);
        }
    } while (VL_UNLIKELY(__Vchange));
}

VL_INLINE_OPT void Vsecret_impl::PSZxtZ(Vsecret_impl_PSvZrA* __restrict vlSymsp) {
    VL_DEBUG_IF(VL_DBG_MSGF("+    Vsecret_impl::PSZxtZ\n"); );
    Vsecret_impl* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
    // Variables
    IData PSMjxy;
    // Body
    PSMjxy = vlTOPp->PSxTSi;
    PSMjxy = (vlTOPp->PSxTSi + vlTOPp->a);
    vlTOPp->x = ((0xaU < vlTOPp->PSxTSi) ? vlTOPp->b
                  : ((IData)(9U) + (vlTOPp->a + vlTOPp->b)));
    vlTOPp->PSxTSi = PSMjxy;
}

void Vsecret_impl::PSb7EA(Vsecret_impl_PSvZrA* __restrict vlSymsp) {
    VL_DEBUG_IF(VL_DBG_MSGF("+    Vsecret_impl::PSb7EA\n"); );
    Vsecret_impl* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
    // Body
    if (((IData)(vlTOPp->clk) & (~ (IData)(vlTOPp->PSbAU8)))) {
        vlTOPp->PSZxtZ(vlSymsp);
    }
    // Final
    vlTOPp->PSbAU8 = vlTOPp->clk;
}

VL_INLINE_OPT QData Vsecret_impl::PSk3CK(Vsecret_impl_PSvZrA* __restrict vlSymsp) {
    VL_DEBUG_IF(VL_DBG_MSGF("+    Vsecret_impl::PSk3CK\n"); );
    Vsecret_impl* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
    // Body
    return (vlTOPp->PS1f7R(vlSymsp));
}

VL_INLINE_OPT QData Vsecret_impl::PS1f7R(Vsecret_impl_PSvZrA* __restrict vlSymsp) {
    VL_DEBUG_IF(VL_DBG_MSGF("+    Vsecret_impl::PS1f7R\n"); );
    Vsecret_impl* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
    // Body
    // Change detection
    QData __req = false;  // Logically a bool
    return __req;
}

#ifdef VL_DEBUG
void Vsecret_impl::PSS4mM() {
    VL_DEBUG_IF(VL_DBG_MSGF("+    Vsecret_impl::PSS4mM\n"); );
    // Body
    if (VL_UNLIKELY((clk & 0xfeU))) {
        Verilated::overWidthError("clk");}
}
#endif  // VL_DEBUG
